Rowboat

An encryption chip for ELEC 422, VLSI Disign.

This page is Netscape 1.1 Enhanced


DESIGN PROPOSAL

Initial Design Proposal



ABOUT THE CHIP

Not really much to say yet, but you can read our Algorithm Proposal.

Here is a slightly incomplete Block Diagram .

Here is a description of the timing and control for the chip, soon to be accompanied by a nifty computer-drawn copy of our finite state machine.



ABOUT THE DESIGNERS

Frank Alejano , John Cusey, and Chris Pickett all were Freshmen back when Wiess was cool.



WHAT THE FUTURE HOLDS

On October 26, 1995, this is where we were at....

Eventually, we should have links available to all the relevant portions of the project: the proposal, the functional description, the block diagram, the schematics, the layout, and the verification simulations. Just give us time.

Status Report



THE FINISHED PRODUCT

We're done!!!!!

  • A sideways postscript of the cell heiarchy .
  • The pin layout .
  • A colorplot of the chip. Warning, this may take a while upload.
  • If you really want to look at the chip on the lowest possible level, here is the cif-file .
  • The final Mosis Report .
  • The Finished Testing Report .

  • May 1, 1996