-- State machine for VLSI Design Project -- RVRBOT -- 10 Result -- --------------- -- 00 Equal -- 01 Less Than -- 10 Greater Than -- 11 N/A #define RES Res1 Res0 #define EQ 0 0 #define LT 0 1 #define GT 1 0 -- 10 Direction -- ----------------- -- 00 North -- 01 East -- 10 South -- 11 West #define DIR Dir1 Dir0 #define NORTH 0 0 #define EAST 0 1 #define SOUTH 1 0 #define WEST 1 1 -- There is 1 ALU select operation line. The different combinations are: -- -- 0 Function -- ----------------- -- 0 Increment -- 1 Decrement #define INCR Op=0 #define DECR Op=1 -- There are 4 select register lines. The different combinations are: -- -- Mux1: Sel2 Sel0 -- Mux2: Sel1 Sel0 -- Mux3: Sel2(bar) (need to AND both with Sel3) -- Mux4: Sel1 Sel2(bar) (need to AND both with Sel3) -- DeM: Sel2 Sel1 Sel0 -- -- 3210 Mux1 Mux2 Mux3 Mux4 DeM -- -------------------------------- -- 0000 Y Ymin Y Ymin Ymin -- 0001 X Xmin X Xmin Xmin -- 0010 Y Ymax Y Ymax Ymax -- 0011 X Xmax X Xmax Xmax -- 0100 Ymin Ymin Ymin Ymin Pre -- 0101 Xmin Xmin Xmin Xmin Cur -- 0110 Ymin Ymax Ymin Ymax Y -- 0111 Xmin Xmax Xmin Xmax X -- 1000 " " Y 15 " -- 1001 " " X 15 " -- 1010 " " Y 0 " -- 1011 " " X 0 " -- 1100 " " Pre Cur " -- 1101 " " Pre Cur " -- 1110 " " Pre Cur " -- 1111 " " Pre Cur " #define Y_YMIN Sel3=0 Sel2=0 Sel1=0 Sel0=0 #define X_XMIN Sel3=0 Sel2=0 Sel1=0 Sel0=1 #define Y_YMAX Sel3=0 Sel2=0 Sel1=1 Sel0=0 #define X_XMAX Sel3=0 Sel2=0 Sel1=1 Sel0=1 #define YMIN_YMAX Sel3=0 Sel2=1 Sel1=1 Sel0=0 #define XMIN_XMAX Sel3=0 Sel2=1 Sel1=1 Sel0=1 #define Y_15 Sel3=1 Sel2=0 Sel1=0 Sel0=0 #define X_15 Sel3=1 Sel2=0 Sel1=0 Sel0=1 #define Y_0 Sel3=1 Sel2=0 Sel1=1 Sel0=0 #define X_0 Sel3=1 Sel2=0 Sel1=1 Sel0=1 #define CUR_PRE Sel3=1 Sel2=1 Sel1=1 Sel0=0 #define D_YMIN Sel3=0 Sel2=0 Sel1=0 Sel0=0 #define D_XMIN Sel3=0 Sel2=0 Sel1=0 Sel0=1 #define D_YMAX Sel3=0 Sel2=0 Sel1=1 Sel0=0 #define D_XMAX Sel3=0 Sel2=0 Sel1=1 Sel0=1 #define D_PRE Sel3=0 Sel2=1 Sel1=0 Sel0=0 #define D_CUR Sel3=0 Sel2=1 Sel1=0 Sel0=1 #define D_Y Sel3=0 Sel2=1 Sel1=1 Sel0=0 #define D_X Sel3=0 Sel2=1 Sel1=1 Sel0=1 #define YPOS Sel3=0 Sel2=0 Sel1=0 Sel0=0 #define XPOS Sel3=0 Sel2=0 Sel1=0 Sel0=1 #define ERROR Sel3=1 Sel2=1 Sel1=1 Sel0=1 INPUTS: Res1 Res0 Dir1 Dir0 QueryReq Restart DataRdy; OUTPUTS: Done Op Sel3 Sel2 Sel1 Sel0 DataAq IncrDir Write QueryActive; -- NOTE: Can just reset Y register to the result of the initial move. reset on Restart to restart(D_CUR Write=1); -- Need to reset registers to initial values (could be either 0 or 1.) -- Also, store the current intensity in previous intensity and begin move. -- STATE 1 restart: goto wait(D_PRE Write=1 DataAq=1); -- Wait for movement to stop. -- STATE 2 wait: if DataRdy then startComp(D_CUR Write=1) else wait(DataAq=1); -- Initiate the compare of intensities -- STATE 3 startComp: goto compInt(CUR_PRE); -- Checks the result of the compare. -- STATE 4 compInt: case (RES DIR) GT NORTH => checkDone1(D_YMIN Write=1); GT EAST => checkDone1(D_XMIN Write=1); GT SOUTH => checkDone1(D_YMAX Write=1); GT WEST => checkDone1(D_XMAX Write=1); LT NORTH => reverseMove1(IncrDir=1); LT EAST => reverseMove1(IncrDir=1); LT SOUTH => reverseMove1(IncrDir=1); LT WEST => reverseMove1(IncrDir=1); EQ NORTH => checkDone1(IncrDir=1); EQ EAST => checkDone1(IncrDir=1); EQ SOUTH => checkDone1(IncrDir=1); EQ WEST => checkDone1(IncrDir=1); endcase => error; -- Finish reversing direction. -- NOTE: For reverseMove2, I will look for what the direction WILL BE -- after the next right turn. This saves a state. -- STATE 5 reverseMove1: case(DIR) WEST => reverseMoveSet(YPOS INCR IncrDir=1); NORTH => reverseMoveSet(XPOS INCR IncrDir=1); EAST => reverseMoveSet(YPOS DECR IncrDir=1); endcase => reverseMoveSet(XPOS DECR IncrDir=1); -- Now the direction should be the true direction reverse direction. -- STATE 6 reverseMoveSet: case (DIR) NORTH => reverseMove2(D_Y Write=1); EAST => reverseMove2(D_X Write=1); SOUTH => reverseMove2(D_Y Write=1); endcase => reverseMove2(D_X Write=1); -- STATE 7 reverseMove2: if DataRdy then reverseMove3(D_CUR Write=1) else reverseMove2(DataAq=1); -- STATE 8 reverseMove3: case (DIR) NORTH => checkDone1(D_YMIN Write=1); EAST => checkDone1(D_XMIN Write=1); SOUTH => checkDone1(D_YMAX Write=1); endcase => checkDone1(D_XMAX Write=1); -- The check sequence that follows is about to see if the source has been -- found. This is true if the following equation holds true: -- Ymin==Ymax && Xmin==Xmax -- Send to the ALU the equation: -- Ymin==Ymax -- STATE 9 checkDone1: goto checkDone2(YMIN_YMAX); -- Check the result of the previous compare. If the equation is true, send -- to the ALU the equation: -- Xmin==Xmax -- If not true, need to find the next direction to move. -- STATE 10 checkDone2: case (RES DIR) EQ NORTH => checkDone3(XMIN_XMAX); EQ EAST => checkDone3(XMIN_XMAX); EQ SOUTH => checkDone3(XMIN_XMAX); EQ WEST => checkDone3(XMIN_XMAX); LT NORTH => fromNorth1(Y_YMAX); LT EAST => fromEast1(X_XMAX); LT SOUTH => fromSouth1(Y_YMIN); LT WEST => fromWest1(X_XMIN); GT NORTH => fromNorth1(Y_YMAX); GT EAST => fromEast1(X_XMAX); GT SOUTH => fromSouth1(Y_YMIN); GT WEST => fromWest1(X_XMIN); endcase => error; -- Check the result of the previous compare. -- STATE 11 checkDone3: case (RES DIR) EQ NORTH => done1(Done YPOS); EQ EAST => done1(Done YPOS); EQ SOUTH => done1(Done YPOS); EQ WEST => done1(Done YPOS); LT NORTH => fromNorth1(Y_YMAX); LT EAST => fromEast1(X_XMAX); LT SOUTH => fromSouth1(Y_YMIN); LT WEST => fromWest1(X_XMIN); GT NORTH => fromNorth1(Y_YMAX); GT EAST => fromEast1(X_XMAX); GT SOUTH => fromSouth1(Y_YMIN); GT WEST => fromWest1(X_XMIN); endcase => error; -- The next set of states will find the next direction to move. -- STATE 12 fromNorth1: case (RES) EQ => fromEast1(X_XMAX IncrDir=1); LT => fromNorth2(Y_15); GT => fromNorth2(Y_15); endcase => error; -- STATE 13 fromNorth2: case (RES QueryReq) EQ ? => fromEast1(X_XMAX IncrDir=1); LT 0 => beginMove1(D_PRE Write); LT 1 => query1(Y_YMIN QueryActive=1); GT 0 => beginMove1(D_PRE Write); GT 1 => query1(Y_YMIN QueryActive=1); endcase => error; -- STATE 14 fromEast1: case (RES) EQ => fromSouth1(Y_YMIN IncrDir=1); LT => fromEast2(X_15); GT => fromEast2(X_15); endcase => error; -- STATE 15 fromEast2: case (RES QueryReq) EQ ? => fromSouth1(Y_YMIN IncrDir=1); LT 0 => beginMove1(D_PRE Write); LT 1 => query1(Y_YMIN QueryActive=1); GT 0 => beginMove1(D_PRE Write); GT 1 => query1(Y_YMIN QueryActive=1); endcase => error; -- STATE 16 fromSouth1: case (RES) EQ => fromWest1(X_XMIN IncrDir=1); LT => fromSouth2(Y_0); GT => fromSouth2(Y_0); endcase => error; -- STATE 17 fromSouth2: case (RES QueryReq) EQ ? => fromWest1(X_XMIN IncrDir=1); LT 0 => beginMove1(D_PRE Write); LT 1 => query1(Y_YMIN QueryActive=1); GT 0 => beginMove1(D_PRE Write); GT 1 => query1(Y_YMIN QueryActive=1); endcase => error; -- STATE 18 fromWest1: case (RES) EQ => fromNorth1(Y_YMAX IncrDir=1); LT => fromWest2(X_0); GT => fromWest2(X_0); endcase => error; -- STATE 19 fromWest2: case (RES QueryReq) EQ ? => fromNorth1(Y_YMAX IncrDir=1); LT 0 => beginMove1(D_PRE Write); LT 1 => query1(Y_YMIN QueryActive=1); GT 0 => beginMove1(D_PRE Write); GT 1 => query1(Y_YMIN QueryActive=1); endcase => error; -- Begin output of registers -- STATE 20 query1: goto query2(X_XMIN QueryActive=1); -- STATE 21 query2: goto query3(Y_YMAX QueryActive=1); -- STATE 22 query3: goto query4(X_XMAX QueryActive=1); -- STATE 23 query4: if QueryReq then query1(Y_YMIN QueryActive=1) else beginMove1(D_PRE Write); -- STATE 24 beginMove1: case (DIR) NORTH => setY(YPOS INCR); EAST => setX(XPOS INCR); SOUTH => setY(YPOS DECR); WEST => setX(XPOS DECR); endcase => error; -- STATE 25 setY: goto beginMove2(D_Y Write=1); -- STATE 26 setX: goto beginMove2(D_X Write=1); -- STATE 27 beginMove2: goto beginMove3(D_PRE Write=1); -- STATE 28 beginMove3: goto wait(DataAq=1); -- Finished. -- STATE 29 done1: goto done2(Done XPOS); -- STATE 30 done2: goto done1(Done YPOS); -- An error has occurred somewhere. This should never be reached. -- STATE 31 (not on diagram) error: goto error;